AKM AK4634EN Evaluation Board Manual

タイプ
Evaluation Board Manual
[AKD4634EN-A]
<KM115300> 2013/09
- 1 -
AKD4634EN-A MIC/SPK 16 CODEC AK4634EN
A/D D/A A/D D/A
AKD4634EN-A --- AK4634EN
(IBM-AT
Windows NT )
DIT, DIR
BNC
10
10pin Header
Control Data
10pin Header
GND
LIN/
MICN
AK4114
Opt In
Opt Out
Clock
Gen
AK4634
SVDDAVDD
DSP
DVDD
MIC-Jack
SPK-Jack
AOUT
MIC/
MICP
5V
Regulator
3.3V
Figure 1. AKD4634EN-A
*
AK4634EN Rev.2
AKD4634EN-A
[AKD4634EN-A]
<KM115300> 2013/09
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.
1)
1-1) AVDD, DVDD, SVDD, VCC
[REG] ( ) = 5V
[AVDD] ( ) = open (Reg3.3V )
[DVDD] ( ) = open (Reg3.3V )
[SVDD] ( ) = open (Reg3.3V )
[VCC] ( ) = open (Reg3.3V : )
[AVSS] ( ) = 0V
[SVSS] ( ) = 0V
[DGND] ( ) = 0V
1-2) AVDD, DVDD, SVDD, VCC
[REG] ( ) = open
[AVDD] ( ) = 2.2 3.6V (typ. 3.3V)
[DVDD] ( ) = 2.7 3.6V (typ. 3.3V)
[SVDD] ( ) = 2.2 4.0V (typ. 3.3V)
[VCC] ( ) = 2.7 3.6V (typ. 3.3V: )
[AVSS] ( ) = 0V
[SVSS] ( ) = 0V
[DGND] ( ) = 0V
DVDD VCC
2)
DIP ( )
3)
SW1 SW2( ) “L” AK4114 AK4634EN
“H”
JP3
AVDD_SEL
AVDDREG
JP4
SVDD_SEL
REGSVDD
JP9
DVDD_SEL
AVDDDVDD
JP10
LVC_SEL
DVDDVCC
JP11
VCC_SEL
LVCVCC
JP3
AVDD_SEL
AVDDREG
JP4
SVDD_SEL
REGSVDD
JP9
DVDD_SEL
AVDDDVDD
JP10
LVC_SEL
DVDDVCC
JP11
VCC_SEL
LVCVCC
[AKD4634EN-A]
<KM115300> 2013/09
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AK4114 AK4634EN AK4634EN AK4114
AK4634EN AK4634EN
AK4114 Table 2
(1) : PLL, Master Mode ( )
(2) : PLL, Slave Mode (PLL Reference CLOCK MCKI pin )
(3) : PLL, Slave Mode (PLL Reference CLOCK BICK or FCK pin )
(4) : EXT, Master Mode
(5) DIR/DIT( ) D/A A/D : EXT, Slave Mode
[AKD4634EN-A]
<KM115300> 2013/09
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(1) : PLL, Master Mode ( )
(1-1) MCKI
SW3 No.8(M/S) “H” X1 12MHz, 13.5MHz, 24MHz 27MHz
12MHz
J8 (EXT/BICK) JP17(XTE) JP21(MCLK_SEL)
“EXT” JP23 (EXT1) R26
(1-2) BICK
BICK (16fs/32fs/64fs) AK4634EN BCKO1-0 bit
JP19
(1-3) FCK
(1-4) DATA
(A/D Æ D/A)
JP29
BICK_SEL
JP20
BICK
JP27
BICK_INV
JP19
EXT16fs32fs64fs
THRINV
DIR ADC
BICK
THRINV
JP22
FCK_SEL
2fs EXT
JP28
FCK
ADCDIR
1fs
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
JP17
XTE
MCLK_SEL
JP21
JP18
MKFS
256fs 512fs
1024fs
XTL
DIR
EXT
MCKO
[AKD4634EN-A]
<KM115300> 2013/09
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(2) : PLL, Slave Mode (PLL Reference CLOCK MCKI pin )
(2-1) MCKI
X1 12MHz, 13.5MHz, 24MHz 27MHz 12MHz
12MHz PLL
AK4634EN MCKO-pin (74VHC4040) BICK, FCK
AK4634EN MCKO bit “1”
J8 (EXT/BICK) JP17 (XTE) JP21 (MCLK_SEL)
“EXT” JP23 (EXT1) R26
(2-2) BICK
BICK JP19 (BICK_SEL) 64fs, 32fs, 16fs
(2-3) FCK
(2-4) DATA
(A/D Æ D/A)
JP29
JP20
BICK
JP27
BICK_INV
THRINV
DIR ADC
BICK
THRINV
JP28
FCK
ADCDIR
JP22
FCK_SEL
2fs EXT1fs
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
BICK_SEL
JP19
EXT16fs32fs64fs
JP17
XTE
MCLK_SEL
JP21
JP18
MKFS
256fs 512fs
1024fs
XTL
DIR
EXT
MCKO
[AKD4634EN-A]
<KM115300> 2013/09
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(3) : PLL, Slave Mode (PLL Reference CLOCK BICK or FCK pin )
(3-1) MCKI
J8 (EXT/BICK) (74VHC4040) BICK, FCK JP23 (EXT1)
R26 JP18 (MKFS)
*J8 (EXT/BICK), J9 (FCK) BICK, FCK JP21 (MCLK_SEL) “XTL”
*XTL X1 256fs, 512fs, 1024fs JP17 “Open” JP21 “XTL”
(3-2) BICK
BICK JP19 (BICK_SEL) 64fs, 32fs, 16fs
*J8 (EXT/BICK), J9 (FCK) BICK, FCK JP19 (BICK_SEL) “EXT”
JP23 (EXT1) R26
(3-3) FCK
*J8 (EXT/BICK), J9 (FCK) BICK, FCK JP22 (FCK_SEL) “EXT”
JP24 (EXT2) R27
(3-4) DATA
(A/D Æ
D/A)
JP22
FCK_SEL
2fs EXT1fs
JP28
FCK
ADCDIR
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
BICK_SEL
JP19
EXT16fs32fs64fs
JP17
XTE
MCLK_SEL
JP21
JP18
MKFS
256fs 512fs
1024fs
XTL
DIR
EXT
MCKO
JP29
JP20
BICK
JP27
BICK_INV
THRINV
DIR ADC
BICK
THRINV
[AKD4634EN-A]
<KM115300> 2013/09
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(4) : EXT, Master Mode
(4-1) MCKI
SW3 No.8 (M/S) “H” J8 (EXT/BICK) 256fs, 512fs 1024fs
JP23 (EXT1) R26
(4-2) BICK
BICK (32fs/64fs) AK4634EN BCKO1-0 bit
JP19
(4-3) FCK
(4-4) DATA
(A/D Æ D/A)
JP29
BICK_SEL
JP20
BICK
JP27
BICK_INV
JP19
EXT16fs32fs64fs
THRINV
DIR ADC
BICK
THRINV
JP22
FCK_SEL
2fs EXT
JP28
FCK
ADCDIR
1fs
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
JP17
XTE
MCLK_SEL
JP21
JP18
MKFS
256fs 512fs
1024fs
XTL
DIR
EXT
MCKO
[AKD4634EN-A]
<KM115300> 2013/09
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(5) DIR/DIT( ) D/A A/D : EXT, Slave Mode
(5-1) MCKI
(5-2) BICK
(5-3) FCK
(5-4) DATA
AK4114 DIR D/A
AK4114 DIT A/D
JP29
JP20
BICK
JP27
BICK_INV
THRINV
DIR ADC
BICK
THRINV
JP28
FCK
ADCDIR
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
BICK_SEL
JP19
EXT16fs32fs64fs
JP17
XTE
MCLK_SEL
JP21
JP18
MKFS
256fs 512fs
1024fs
XTL
DIR
EXT
MCKO
JP22
FCK_SEL
2fs EXT1fs
JP26
4632_SDTI
ADC
DAC/LOOP
JP30
SDTI
DIR
ADC
[AKD4634EN-A]
<KM115300> 2013/09
- 9 -
DIP
[SW3] (MODE): AK4634EN AK4114
ON “H”, OFF “L”
No. Name OFF (“L”) ON (“H”) Default
1 DIF0
AK4114 Audio Format Setting
Off
2 DIF1
Table 2
Off
3 DIF2 On
4 CM0
Off
5 CM1
Table 3.
On
6 OCKS0
Off
7 OCKS1
Table 4.
Off
8 M/S
Slave mode Master mode
On
Note: PLL, Master Mode M/S “H”
Table 1. AK4634EN AK4114
AK4634EN
AK4114:SW3
DIF1 bit DIF0 bit DIF0 DIF1 DIF2 DAUX SDTO
0 1 L L L 24bit, Left justified 16bit, Right justified
1 0 L L H 24bit, Left justified 24bit, Left justified Default
1 1 H L H 24bit, I
2
S 24bit, I
2
S
Note: AK4114 M/S “L”
Table 2. AK4114
Mode CM0 CM1 UNLOCK PLL X'tal Clock source SDTO
Default
0 L L - ON OFF PLL RX
1 H L - OFF ON X'tal DAUX
2 L H
0 ON ON PLL RX
1 ON ON X'tal DAUX
3 H H - ON ON X'tal DAUX
ON: (Power-up), OFF: (Power-Down)
* Default
Table 3.
No. OCKS0 OCKS1
MCKO1 MCKO2 X’tal
Default
0 L L 256fs 256fs 256fs
2 L H 512fs 256fs 512fs
Table 4.
[AKD4634EN-A]
<KM115300> 2013/09
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1) JP1 (GND) : AGND DGND
OPEN: AGND DGND
SHORT: AGND DGND <Default>
2) JP3(AVDD_SEL) : AVDD
REG: AVDD <Default>
AVDD: AVDD AVDD
3) JP4(SVDD_SEL) : SVDD
REG: SVDD <Default>
SVDD: SVDD SVDD
4) JP9(DVDD_SEL) : DVDD
AVDD: DVDD AVDD <Default>
DVDD: DVDD DVDD
5) JP10(LVC_SEL): LVC Logic
DVDD: LVC Logic DVDD <Default>
VCC: LVC Logic VCC
6) JP11(VCC_SEL): Logic
LVC: Logic LVC <Default>
VCC: Logic VCC
7) JP25(MCKO_SEL): AK4114 MCKO
MCKO1: MCKO1 <Default>
MCKO2: MCKO2
8) JP102(I2C) :
OPEN: 3 <Default>
SHORT: I2C (AKD4634EN-A )
9) JP103(MCKO) : MCKO
OPEN: MCKO
SHORT: MCKO <Default>
[AKD4634EN-A]
<KM115300> 2013/09
- 11 -
“H” “L”
[SW1] (DIR): AK4114 “H”
“L”
AK4114 “L”
[SW2] (PDN): AK4634EN “H”
“L”
LED
[LED1] (ERF): AK4114 PLL
AKD4634EN-A IBM-AT ( )
10 PORT4 (CTRL) PC
Connect
CSN
CCLK
CDTI
10pin Header
10pin
Connector
10 wire
flat cable
PC
AKD4635
Figure 2. 10
[AKD4634EN-A]
<KM115300> 2013/09
- 12 -
(1)
(1-1) MIC/MICP
Figure 3. MIC
J1 MIC/MICP
JP12
MIC_SEL
JACKRCA
JP105
MPI
J3 MIC/MICP
JP12
MIC_SEL
JACKRCA
JP105
MPI
A
VSS
A
VSS
MIC/MICP
2
3
1
J3
MR-552LS
JP105
MPI
MIC
JACK
RCA
C108
1u
6
4
3
J1
MIC-JACK
JP12
MIC_SEL
R112
2.2k
MPI
[AKD4634EN-A]
<KM115300> 2013/09
- 13 -
(1-2) LIN/MICN
Figure 4. LIN/MICN
LIN
JP104
MICN
MICN
JP104
MICN
LIN/MICN
C112
1u
R113
2.2k
JP113
MICN
LIN/MICN
2
3
1
J4
MR-552LS
A
VSS
R18
47k
[AKD4634EN-A]
<KM115300> 2013/09
- 14 -
(2)
(2-1) AOUT
Figure 5. AOUT
J5
MR-552LS
AOUT
R20
220
2
1
3
R21
20k
+
C28
1u
1 2
AVSS
AVSS
AOUT
[AKD4634EN-A]
<KM115300> 2013/09
- 15 -
(2-2) SPK
) J2 SPK-JACK J13 J14 open PMSPK
bit “0”
Figure 6. SPK
J2 SPK-JACK
J2 SPK-JACK
SPK1
SPP
JP13
SPP_SEL
SPK1
Dynamic
D2
DIODE ZENER
A K
JP14
SPN_SEL
Piezo(EXT)
Dynamic (EXT)
020S16
SVSS
R
R15
10
Piezo(EXT)
L
R17
10
D1
DIODE ZENER
A K
JP31
Dynamic
CN5
1
2
Dynamic
SVSS
J2
SPK-JACK
6
4
3
Dynamic(EXT)
SPN
SVSS
JP14
SPN_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP13
SPP_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP31
Dynamic
JP14
SPN_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP13
SPP_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP31
Dynamic
JP14
SPN_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP13
SPP_SEL
Dynamic Dynamic(EXT)
Piezo(EXT)
JP31
Dynamic
[AKD4634EN-A]
<KM115300> 2013/09
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1. AKD4634EN-A
2. IBM-AT AKD4634EN-A 10 10
(Windows 2000/XP
“AKM
Windows95/98/ME
Windows NT )
3. “AKD4634EN Evaluation Kit” CD-ROM CD-ROM
4. CD-ROM “AKD4634EN.exe”
5.
1.
2. Port Reset
3. Write default
1. [Port Reset] : USB I/F (AKDUSBIF-A)
2. [Write Default] : AK4634EN
3. [All Write] :
4. [Function1] :
5. [Function2] :
6. [Function3] :
7. [Function4] : [Function3]
8. [Function5] : [Save]
9. [SAVE] :
10. [OPEN] :
11. [Write] :
12. [Filter] : AK4634EN Programmable Filter (HPF, LPF, EQ1~5)
“H” “1” “L” “0”
[AKD4634EN-A]
<KM115300> 2013/09
- 17 -
1. [Write ] :
[Write]
(9 ) “H” “1”
“L” “0”
AK4634EN [OK] [Cancel]
2. [Function1 ] :
Address : 16 2
Data : 16 2
AK4634EN [OK] [Cancel]
3. [Function2 ] : IVOL, OVOL
09H, 0AH
Address : 16 2
Start Data : Start Data 16 2
End Data : End Data 16 2
Interval : Interval AK4634EN
Step : Step
Mode Select : 9
: Start Data End Data Start Data
[ ] Start Data = 00, End Data = 09
: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
: Start Data End Data Start Data
[ ] Start Data = 00, End Data = 09
: 00 01 02 03 04 05 06 07 08 09
AK4634EN [OK] [Cancel]
[AKD4634EN-A]
<KM115300> 2013/09
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4. [SAVE] [OPEN]
4-1. [SAVE]
“akr”
(1) [SAVE]
(2) [ (S)] “akr”
4-2. [OPEN]
[SAVE] AK4634EN [SAVE]
(1) [OPEN]
(2) ( “akr ”) [ (O)]
[AKD4634EN-A]
<KM115300> 2013/09
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5. [Function3 ]
(1) [F3]
(2)
“-1”
(3) [START]
“-1” [START]
[Function3] Window [Save] [OPEN]
“aks”
Figure 7. [F3] window
[AKD4634EN-A]
<KM115300> 2013/09
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6. [Function4 ]
[Function3] [F4]
Figure 8. window
Figure 8. [F4] window
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AKM AK4634EN Evaluation Board Manual

タイプ
Evaluation Board Manual