Yamaha ACD1 ユーザーマニュアル

SERVICE MANUAL

HAMAMATSU, JAPAN

SERVICE MANUAL

200910-262500

&

’09.10

SPECIFICATIONS ....................... 4/5

DIMENSIONS ..................................... 6

CIRCUIT BOARD LAYOUT

.. 6

PANEL LAYOUT ............... 7

WIRING ....................................... 8

DISASSEMBLY PROCEDURE ....... 9

LSI PIN DESCRIPTION ...... 15

IC BLOCK DIAGRAM ........... 18

CIRCUIT BOARDS ................ 22

TEST PROGRAM ...... 32/47

UPDATING

.......................... 62/75

CONTENTS

INITIALIZATION FOR FACTORY SHIPMENT SETUP

...................... 88/89

.................. 90/91

TROUBLESHOOTING

......................... 92/93

SEQUENCE WHEN POWER IS TURNED ON

.................................. 94/95

PARTS LIST

BLOCK DIAGRAM

CIRCUIT DIAGRAM

PA

011936

ACD1

2

WARNING

IMPORTANT NOTICE

This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed that basic

service procedures inherent to the industry, and more specifically Yamaha Products, are already known and understood by the users,

and have therefore not been restated.

WARNING :

Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury, de-

struction of expensive components and failure of the product to perform as specified. For these reasons, we advise all

Yamaha product owners that all service required should be performed by an authorized Yamaha Retailer or the appointed

service representative.

IMPORTANT :

This presentation or sale of this manual to any individual or firm does not constitute authorization certification, recog-

nition of any applicable technical capabilities, or establish a principal-agent relationship of any form.

The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and service

departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable and changes in

specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the

distributor’s Service Division.

WARNING :

Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by

grounding yourself to the ground bus in the unit (heavy gauge black wires connect to this bus.)

IMPORTANT :

Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power to the unit.

Components having special characteristics are marked and must be replaced with parts having speciﬁ cation equal to those

originally installed.

• This applies only to products distributed by Yamaha Music U.K. Ltd. (3 wires)

IMPORTANT NOTICE FOR THE UNITED KINGDOM

Connecting the Plug and Cord

WARNING :

THIS APPARATUS MUST BE EARTHED IMPORTANT. The wires in this mains lead are coloured in accordance with the following

code:

GREEN-AND-YELLOW : EARTH

BLUE : NEUTRAL

BROWN : LIVE

As the colours of the wires in the mains lead of this apparatus may not correspond with the coloured markings identifying the terminals in your plug

proceed as follows:

The wire which is coloured GREEN-and-YELLOW must be connected to the terminal in the plug which is marked by the letter E or by the safety earth

symbol

or colored GREEN or GREEN-and-YELLOW.

The wire which is coloured BLUE must be connected to the terminal which is marked with the letter N or coloured BLACK.

The wire which is coloured BROWN must be connected to the terminal which is marked with the letter L or coloured RED.

WARNING: This product contains chemicals known to the State of California to cause cancer, or birth defects or other reproductive harm.

DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT SO EVER!

Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/

flux vapor!

If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling food.

3

ACD1

LITHIUM BATTERY HANDLING

This product uses a lithium battery for memory back-up.

WARNING :

Lithium batteries are dangerous because they can be exploded by improper handling. Observe the following precautions when

handling or replacing lithium batteries.

• Leave lithium battery replacement to qualiﬁ ed service personnel.

• Always replace with batteries of the same type.

• When installing on the PC board by soldering, solder using the connection terminals provided on the battery cells.

• Never solder directly to the cells. Perform the soldering as quickly as possible.

• Never reverse the battery polarities when installing.

• Do not short the batteries.

• Do not attempt to recharge these batteries.

• Do not disasemble the batteries.

• Never heat batteries or throw them into ﬁ re.

ADVARSEL!

Lithiumbatteri-Eksplosionsfare ved fejlagtig handtering. Udskiftning ma kun ske med batteri af samme fabrikat og type. lever det brugte batteri tilbage til

leverandren.

VARNING

Explosionsfara vid felaktigt batteribyte.

Anvand samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren.

Kassera anvant batteri enligt fabrikantens instruktion.

VAROITUS

Paristo voi rajahtaa, jos se on virheellisesti asennettu.

Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiiin.

Havita kaytetty paristo valmistajan ohjeiden mukaisesti.

The following information complies with Dutch ofﬁ cial Gazette 1995. 45; ESSENTIALS OF ORDER ON THE COLLECTION OF BATTERIES.

• Please refer to the diassembly procedure for the removal of Back-up Battery.

• Leest u voor het verwijderen van de backup batterij deze beschrijving.

■

BACKUP BATTERY

This device has a built-in backup battery. When

you unplug the power cord from the AC outlet, the

internal current scene data and the Device Setup,

Utility, and Network Setup parameters are retained.

However, if the backup battery fully discharges,

these datas will be lost. When the backup battery is

running low, the display indicates “Critical Battery”

or “No Battery.” In this case, save the data to a

computer immediately.

This product contains a battery that contains perchlorate material.

Perchlorate Material—special handling may apply,

See www.dtsc.ca.gov/hazardouswaste/perchlorate.

* This applies only to products distributed by YAMAHA CORPORATION OF AMERICA. (Perchlorate)

Be sure to

perform it

ACD1

4

SPECIFICATIONS

Scene Memory 50 scenes per ampliﬁ er

Number of ampliﬁ ers

that can be connected

Via the DATA PORT connector Up to 32 units

Via the MONITOR/REMOTE connector Up to 8 units

Display 16 characters × 2 lines backlit LCD

Power Requirements 100 V, 50 Hz/60 Hz

Power Consumption 15 W

Dimensions (W × H × D) 480 × 44 × 362 mm

Weight 4.0 kg

Operating temperature range 0 °C – 40 °C

Storage temperature range -20 °C – 60 °C

AC Cable Length 250 cm

Accessories AC power cord, Euroblock plug (16P), Owner’s Manual, Rubber feet × 4

• Control I/O

*1

*2

*3

*4

*1

*2

*3

*4

• Pin Assignment

MONITOR/REMOTE

DATA PORT

1 GND

2 REMOTE CONTROL STANDBY

3 MONITOR MODEL ID

4 REMOTE CONTROL MUTE CH D

5 MUTE CH C

6 MUTE CH B

7 MUTE CH A

8 MONITOR PROTECT STATUS CH D

9 PROTECT STATUS CH C

10 PROTECT STATUS CH B

11 PROTECT STATUS CH A

12 OUTPUT LEVEL CH D

13 OUTPUT LEVEL CH C

14 OUTPUT LEVEL CH B

15 OUTPUT LEVEL CH A

1 NC

2 NC

3 NC

4 RxD/TxD -

5 RxD/TxD +

6 NC

7 GND

8 GND

5 4 3 2 1

10 9 8 7 6

15 14 13 12 11

81

5

ACD1

*1

*2

*3

*4

*1

*2

*3

*4

5 4 3 2 1

10 9 8 7 6

15 14 13 12 11

81

ACD1

6

Unit : mm

480

( 1 )

44

3

354

362

( 5 )

FRONT PANEL

POWER SUPPLY UNIT

LCD

PN

PS

DS1

DS2

ENT2

CPU

BRG

CIRCUIT BOARD LAYOUT

DIMENSIONS

7

ACD1

/

62 * 

- 

4)0 1

• FRONT PANEL

• REAR PANEL

• FRONT PANEL

q

Display

w

[BACK] button

e

[ INC/YES] / [ DEC/NO] buttons

r

[NEXT] button

t

[POWER ON/OFF] button

• REAR PANEL

y

Ground screw

u

[AC IN] connector

i

[NETWORK] connector

o

[GPI] connector

!0

[FAULT OUTPUT] connectors

!1

[DATA PORT] connector

!2

[MONITOR/REMOTE] connector

q

w

e

r

t

y

u

i

o

!0

!1

!2

PANEL LAYOUT

ACD1

8

21

53

CPU

BRG

ENT2

DS1

20P

5PCN102 4PCN301

CN401

20P

2P

CN801

5P

CN1

4P

CN51

38P

5P

CN701

CN402

38P

CN203

38P

CN201

38P

CN501

DS2

38P

CN501

20P

CN202

20P

CN202

180P

CN007

180P

CN001

38P

CN101

PN

PS

Power

supply

unit

LCD

AC Inlet

AC IN

WIRING

9

ACD1

Fig. 1

[990]

[940]

[950]

[990]

[980]

[1050]

[1020]

RACK ANGLE

FRONT PANEL

BUTTON GUIDE

We recommend you use the dedicated driver bit from

HIOS Inc. (model number: THS6X-20-75 [AAX91370])

when you remove the screws marked [940] or [980].

DISASSEMBLY PROCEDURE

1. Top Cover

(Time required: About 2 minutes)

1-1 Remove the three (3) screws marked [1020] and three

(3) screws marked [1050]. The right and left rack angle

brackets can then be removed. (Fig. 1)

1-2 Remove the four (4) screws marked [980] and ﬁ ve

(5) screws marked [990]. The top cover can then be

removed. (Fig. 1)

Photo 1

Precautions

* Notes on Flat Cable

Contacts are visible from the back. Pay attention not to

insert and install the cable to the connector inversely.

(Photo 1)

Front Side Back Side

ACD1

10

• LITHIUM BATTERY

Battery VN103500

VN10360R or WR846000 (Battery holder for VN103500)

Notice for back-up battery removal

Push the battery as shown in figure,

then the battery will pop up.

Druk de batterij naar beneden zoals

aangeven in de tekening de batterij

springt dan naar voren.

Battery

Battery holder

CPU

BRG

[70]

Fig. 2

Photo 3

CPU

DSP

Photo 2

2. Front Panel

(Time required: About 3 minutes)

2-1 Remove the top cover. (See procedure 1.)

2-2 Remove the screw marked [940] and three (3) screws

marked [950]. The front panel with button guide can

then be removed. (Fig. 1)

2-3 Remove the button guide from the front panel with

button guide. (Fig. 1)

3. CPU Circuit Board

(Time required: About 3 minutes)

3-1 Remove the top cover. (See procedure 1.)

3-2 Remove the four (4) screws marked [70] and pull out

the CPU circuit board from the BRG circuit board.

(Fig. 2, Photo 2)

4. Replacing the Lithium Battery

(Time required: About 3 minutes)

4-1 Remove the top cover. (See procedure 1.)

4-2 The lithium battery on the CPU circuit board can then

be replaced. (Fig. 2, Photo 3)

* The lithium battery is not part of the CPU circuit

board. When replacing the CPU circuit board,

remove the lithium battery from the circuit board and

install it on the new circuit board. (Photo 3)

11

ACD1

Fig. 3

BRG

DS1

ENT2

[30]

[40]

[510]

[330]

5. BRG Circuit Board

(Time required: About 4 minutes)

5-1 Remove the top cover. (See procedure 1.)

5-2 Remove the CPU circuit board. (See procedure 3.)

5-3 Remove the two (2) screws marked [30] and four (4)

hexagonal spacers marked [40]. The BRG circuit board

can then be removed. (Fig. 3)

6. ENT2 Circuit Board

(Time required: About 3 minutes)

6-1 Remove the top cover. (See procedure 1.)

6-2 Remove the two (2) screws marked [500] and two (2)

screws marked [510]. The ENT2 circuit board can then

be removed. (Fig. 3, Fig. 4)

ACD1

12

DS2

[320]

Fig. 5

Fig. 4

AC INLET ASSEMBLY

[140]

[140] [250]

[500]

[240] [240]

[300] [300]

• Rear view

7. DS1 Circuit Board

(Time required: About 4 minutes)

7-1 Remove the top cover. (See procedure 1.)

7-2 Remove the eight (8) hexagonal locks marked [240]

and two (2) screws marked [330]. The DS1 circuit

board can then be removed. (Fig. 3, Fig. 4)

8. DS2 Circuit Board

(Time required: About 6 minutes)

8-1 Remove the top cover. (See procedure 1.)

8-2 Remove the DS1 circuit board. (See procedure 7.)

8-3 Remove the two (2) screws marked [250], eight (8)

hexagonal locks marked [300] and two (2) hexagonal

spacers marked [320]. The DS2 circuit board can then

be removed. (Fig. 4, Fig. 5)

13

ACD1

Fig. 6

PS

BUTTON

[190]

[570]

[640]

[190]

LCD

PN SHEET ASSEMBLY

SPACER

• PN SHEET ASSEMBLY

PN

HOOK

BUTTON CURSOR

Fig. 7

9. PN Circuit Board, LCD

9-1 Remove the top cover. (See procedure 1.)

9-2 Remove the front panel with button guide.

(See procedure 2.)

9-3

PN Circuit Board

(Time required: About 4 minutes)

9-3-1 Remove the screw marked [570] and unhook the two (2)

hooks on the spacers. The PN circuit board assembly

can then be removed. (Fig. 6)

9-3-2 Unhook the two (2) hooks on the pattern side of the PN

circuit board. The PN circuit board and button cursor

can then be separated. (Fig. 7)

* The botton cursor is not part of the PN circuit board.

When replacing the PN circuit board, remove the

botton cursor from the circuit board and install it on

the new circuit board.

9-4

LCD (Time required: About 3 minutes)

9-4-1 Remove the two (2) screws marked [640]. The LCD

can then be removed. (Fig. 6)

ACD1

14

• Top view

BINDING TIE

[780]

[150]

AC INLET ASSEMBLY

POWER SUPPLY UNIT

[780]

Photo 4

10. PS Circuit Board

(Time required: About 3 minutes)

10-1 Remove the top cover. (See procedure 1.)

10-2 Remove the front panel with button guide.

(See procedure 2.)

10-3 Pull out the button. (Fig. 6)

10-4 Remove the two (2) screws marked [190]. The PS

circuit board can then be removed. (Fig. 6)

11. Power Supply Unit

(Time required: About 3 minutes)

11-1 Remove the top cover. (See procedure 1.)

11-2 Remove the four (4) screws marked [780]. The power

supply unit can then be removed. (Photo 4)

12. AC Inlet Assembly

(Time required: About 3 minutes)

12-1 Remove the top cover. (See procedure 1.)

12-2 Remove the two (2) screws marked [140], the screw

marked [150] and two (2) binding ties. The AC inlet

assembly can then be removed. (Fig. 4, Photo 4)

15

ACD1

NO.

I/O FUNCTIONNAME

NO.

I/O FUNCTIONNAME

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

MDIO

MDC

RXD3/PHYAD1

RXD2/PHYAD2

RXD1/PHYAD3

RXD0/PHYAD4

VDDIO

GND

RXDV/PCS_LPBK

RXC

RXER/ISO

GND

VDDC

TXER

TXC/REF_CLK

TXEN

TXD0

TXD1

TXD2

TXD3

COL/RMII

CRS/RMII_BTB

GND

VDDIO

I/O

I

O

–

O

–

I

I/O

I

O

–

Management Data Input / Output.

Management Data clockt.

Receive Data 3.

Receive Data 2.

Receive Data 1.

Receive Data 0.

Power

Ground

Receive Data Valid.

Receive Clock.

Receive Error.

Ground

Power

Transmit Error.

Transmit Clock.

Transmit Enable input.

Transmit data 0.

Transmit data 1.

Transmit data 2.

Transmit data 3.

Collision (Detect).

Carrier Sense.

Ground

Power

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

INT#/PHYAD0

LED0/TEST

LED1/SPD100

LED2/DUPLEX

LED3/NWAYEN

PD#

VDDRX

RX-

RX+

FXSD/FXEN

GND

REXT

VDDRCV

GND

TX-

TX+

VDDTX

GND

XO

XI

VDDPLL

RST#

O

I

–

I

O

–

I

–

O

–

O

I

–

I

Management interface (Mll) interrupt out.

Link/Activity LED.

Speed LED.

Full-duplex LED.

Collsion LED.

Power down

Power

Receive input.

Fiber Mode Enable / signal detect in fiber Mode.

Ground.

External resistor (6.49kW) connects to REXT and GND.

Power

Ground

Transmit outputs.

Power

Ground.

XTAL Feedback.

Crystal Oscillator.

Power

Chip Reset.

KSZ8721SL (X5621A00) PHY (Physical Layer)

ENT2: IC109

NO.

I/O FUNCTIONNAME

NO.

I/O FUNCTIONNAME

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

TDI

A5

A6

A7

GND0

VCCO0

A8

A9

A10

A11

TCK

VCC

GND

A12

A13

A14

A15

CLK1/I

CLK2/I

B0

B1

B2

B3

B4

I

I/O

–

I/O

I

–

I/O

Test data in

Input/Output

Ground

Power supply +3.3 V

Input/Output

Test clock input

Power supply +3.3 V

Ground

Input/Output

CLK input / Input

Input/Output

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

TMS

B5

B6

B7

GND1

VCCO1

B8

B9

B10

B11

TDO

VCC

GND

B12

B13

B14

B15/GOE1

CLK3/I

CLK0/I

A0/GOE0

A1

A2

A3

A4

I

I/O

–

I/O

O

–

I/O

Test mode select

Input/Output

Ground

Power supply +3.3 V

Input/Output

Test data out

Power supply +3.3 V

Ground

Input/Output

Input/Output / Global output enable input

CLK input / Input

Input/Output / Global output enable input

Input/Output

LC4032V-75TN48C (X7109A00) CPLD (Complex Programmable Logic Device)

IC014

CPU: IC014

LSI PIN DESCRIPTION

LC4032V-75TN48C

(X7109A0R)

CPLD

(Complex Programmable Logic Device) .............................15

HD6417727F160CV

(X2890B00)

CPU

...............................................................................................16

YTD442-RZ

(X7197A00)

VNP1

...........................................................................................................17

KSZ8721SL

(X5621A00)

PHY

(Physical Layer) .................................................................................15

ACD1

16

NO.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

Vcc-RTC

XTAL2

EXTAL2

Vss-RTC

MD1

MD2

NMI

IRQ0/IRL0_/PTH[0]

IRQ1/IRL1_/PTH[1]

IRQ2/IRL2_/PTH[2]

IRQ3/IRL3_/PTH[3]

IRQ4/PTH[4]

VEPWC

VCPWC

MD5

/BREQ

/BACK

VssQ

CKIO2

VccQ

D31/PTB[7]

D30/PTB[6]

D29/PTB[5]

D28/PTB[4]

D27/PTB[3]

D26/PTB[2]

D25/PTB[1]

D24/PTB[0]

VssQ

D23/PTA[7]

VccQ

D22/PTA[6]

D21/PTA[5]

D20/PTA[4]

Vss

D19/PTA[3]

Vcc

D18/PTA[2]

D17/PTA[1]

D16/PTA[0]

D15

VssQ

D14

VccQ

D13

D12

D11

D10

D9

D8

D7

D6

VssQ

D5

VccQ

D4

D3

D2

D1

D0

A0

A1

A2

VssQ

A3

VccQ

A4

A5

A6

A7

A8

A9

A10

A11

VssQ

A12

VccQ

A13

A14

A15

A16

A17

A18

A19

A20

VssQ

A21

VccQ

A22

A23

Vss

A24

Vcc

A25

BS_/PTK[4]

RD_

WE0_/DQMLL

WE1_/DQMLU/WE

WE2_/DQMUL/ICIORD_/PTK[6]

VssQ

WE3_/DQMUU/ICIOWR_/PTK{7}

VccQ

RD/WR_

PTE[7]/PCC0RDY/AUDSYNC_

/CS0

/CS2

/CS3

/CS4/PTK[2]

/CS5/CE1A_/PTK[3}

/CS6/CE1B_

CE2A_/PTE[4]

CE2B_/PTE[5]

AFE_HC1/USB1d_DPLS/PTK[0]

AFE_RLYCNT_/USB1d_DMNS/PTK[1]

VssQ

AFE_SCLK/USB1d_TXDPLS

VccQ

PTM[7]/PTINT[7]/AFE_FS/USB1d_RCV

PTM[6]/PTINT[6]/AFE_RXIN/USB1d_SPEED

PTM[5]/PTINT[5]/AFE_TXOUT/USB1d_TXSE0

-

I

O

-

I/O

-

I/O

-

I/O

-

I/O

-

I/O

-

O

-

O

-

O

-

O

-

O

-

I

-

I

Power supply for RTC (1.9V)

Not in use (XTAL for internal RTC)

Power supply for RTC (0V)

Clock mode setting

Not in use (Non-maskable interrupt request)

External interrupt request

VEE control pin for LCD panel

VCC control pin for LCD panel

Big endian setting

Not in use (bus request)

Bus acknowledge

VssQ

System clock output

VccQ

Data bus

VssQ

Data bus

VccQ

Data bus

Vss

Data bus

Vcc

Data bus

VssQ

Data bus

VccQ

Data bus

VssQ

Data bus

VccQ

Data bus

Address bus

VssQ

Address bus

VccQ

Address bus

VssQ

Address bus

VccQ

Address bus

VssQ

Address bus

VccQ

Address bus

Vss

Address bus

Vcc

Address bus

Not connected (bus cycle start signal)

Read strobe

Write 0 signal

Write 1 signal

Write 2 signal

VssQ

Write 3 signal

VccQ

Read/Write

I/O

Chip Select 0

Chip Select 2

Chip Select 3

Chip Select 4

Chip Select 5

Chip Select 6

Output port (SWP50 Reset)

Output port (PLG Board Reset)

SPD DATA

SPD CL

VssQ

Not in use (USB1 D+ transmission)

VccQ

Not in use

NO.

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

205

206

207

208

209

210

211

212

213

214

215

216

217

218

219

220

221

222

223

224

225

226

227

228

229

230

231

232

233

234

235

236

237

238

239

240

PTM[4]/PINT[4]/AFE_RDET_/USB1d_TXDMNS

Reserved/USB1d_SUSPEND

USB1_ovr_crnt/USBF_VBUS

USB2_ovr_crnt_

RTS2_/USB1d_TXENL

PTE[2]/USB1_pwr_en

PTE[1]/USB2_pwr_en

CKE/PTK[5]

/RAS3/PTJ[0]

Reserved/PTJ[1]

Reserved//CAS/PTJ[2]

VssQ

Reserved/PTJ[3]

VccQ

Reserved/PTJ[4]

Reserved/PTJ[5]

Vss

PTD[5]/CL1

Vcc

PTD[7]/DON

PTE[6]/M_DISP

PTE[3]/FLM

PTE[0]/TDO

PCC0RESET/DRACK0

PCC0DRV_/DACK0_

/WAIT

/RESETM

/ADTRG/PTH[5]

/IOIS16/PTG[7]

/ASEMD0

PTG[5]/ASEBRKAK_

PTG[4]

PCC0BVD2/PTG[3]/AUDATA[3]

PCC0BVD1/PTG[2]/AUDATA[2]

Vss

PCC0CD2/PTG[1]/AUDATA[1]

Vcc

PCC0CD1/PTG[0]/AUDATA[0]

VssQ

PTF[7]/PINT[15]/TRST_

VccQ

PTF[6]/PINT[14]/TMS

PTF[5]/PINT[13]/TDI

PTF[4]/PINT[12]/TCK

PTF[3]/PINT[11]/Reserved

PCCREG_/PTF[2]/Reserved

PCC0VS1_/PTF[1]/Reserved

PCC0VS2_/PTF[0]/Reserved

MD0

Vcc-PLL1

CAP1

Vss-PLL1

Vss-PLL2

CAP2

Vcc-PLL2

PCC0WAIT_/PTH[6]/AUDCK

Vss

Vcc

XTAL

EXTAL

LCD15/PTM[3]/PINT[10]

LCD14/PTM[2]/PINT[9]

LCD13/PTM[1]/PINT[8]

LCD12/PTM[0]

STATUS0/PTJ[6]

STATUS1/PTJ[7]

CL2/PTH[7]

VssQ

CKIO

VccQ

TxD0/SCPT[0]

SCK0/SCPT[1]

TxD_SIO/SCPT[2]

SIOMCLK/SCPT[3]

TxD2/SCPT[4]

SCK_SIO/SCPT[5]

SIOFSYNC/SCPT[6]

RxD0/SCPT[0]

RxD_SIO/SCPT[2]

Vss

RxD2/SCPT[4]

Vcc

SCPT[7]/CTS2_/IRQ5

LCD11/PTC[7]/PINT[3]

LCD10/PTC[6]/PINT[2]

LCD9/PTC[5]/PINT[1]

VssQ

LCD8/PTC[4]/PINT[0]

VccQ

LCD7/PTD[3]

LCD6/PTD[2]

LCD5/PTC[3]

LCD4/PTC[2]

LCD3/PTC[1]

LCD2/PTC[0]

LCD1/PTD[1]

LCD0/PTD[0]

DREQ0_/PTD[4]

LCK/UCLK/PTD[6]

/RESETP

CA

MD3

MD4

/Scan_testen

Avcc_USB

USB1_P

USB1_M

Avss_USB

USB2_P

USB2_M

Avcc_USB

Avss

AN[2]/PTL[2]

AN[3]/PTL[3]

AN[4]/PTL[4]

AN[5]/PTL[5]

Avcc

AN[6]/PTL[6]/DA[1]

AN[7]/PTL[7]/DA[0]

Avss

I

O

I

-

O

-

O

-

O

-

O

-

O

-

I

-

I

-

I

-

I

-

I

-

I

-

I

-

I

O

-

O

i

-

i

-

I

O

-

O

-

O

I

-

IO

-

IO

-

I

-

I

O

-

Not in use

USB function VBUS

USB2_HOST2 over current detection

Not in use

USB1 voltage control

USB2 voltage control

Enable (SDRAM)

RAS for SDRAM

Not in use

CAS for SDRAM

VssQ

Output port (DAC Reset)

VccQ

Output port (SIO Reset)

Output port (DAC Mute)

Vss

LCD line clock

Vcc

LCD DISPLAY ON

LCD alternater

LCD frame line marker

JTAG (test data output)

DMA request acceptance

DMA acknowledge

Hardware wait request

Manual reset request

Analog A/D trigger

Not in use

Vss

Not in use

Vcc

Not in use

VssQ

Not in use

VccQ

Not in use

Clock mode setting

Power supply for Vcc_PLL1 - PLL1(1.9V)

External capacitance for CAP1 _ PLL1

Power supply for Vss_PLL1 _ PLL1(0V)

Power supply for Vss_PLL2 _ PLL2 (0V)

External capacitance for CAP2 _ PLL2

Power supply for Vcc_PLL2 _ PLL2 (1.9V)

Not in use

Vss

Vcc

Clock oscillator

External clock

Not in use

Input port (Flash ROM RY/BY)

Output port (Flash ROM write protect)

Output port (Flash ROM ACC)

LCD clock output

VssQ

System clock input/output (for SDRAM)

VccQ

Output port for SCI

Not in use

Output port for SCI

Not in use

Receiving data 0

Not in use

Vss

Receiving data 2

Vcc

Not in use

Output port (PLG CLOCK ON/OFF)

Not in use

VssQ

Not in use

VccQ

LCD DATA7

LCD DATA6

LCD DATA5

LCD DATA4

LCD DATA3

LCD DATA2

LCD DATA1

LCD DATA0

DMA request

USB clock

Power on reset request

Hardware standby request

Bus width setting for area0

Test pin (fixed to 3.3V)

USB analog power supply (3.3V)

USB1 data input/output (+)

USB1 data input/output (-)

USB analog power supply (0V)

USB2 data input/output (+)

USB2 data input/output (-)

USB analog power supply (3.3V)

A/D analog power supply (0V)

AD converter input

A/D analog power supply (3.3V)

AD converter input

DA converter output (LCD contrast)

A/D analog power supply (0V)

I/O I/O

NAME FUNCTION FUNCTION

NAME

HD6417727F160CV (X2890B00) CPU

CPU: IC002

17

ACD1

NO.

I/O FUNCTIONNAME

NO.

I/O FUNCTIONNAME

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

TDO

TCK

TMS

RTCK

VCC3F

VCCF

VSS_IO

TX_EN

TX_ER

TXD[3]

TXD[2]

VSS

TXD[1]

TXD[0]

TX_CLK

VDD_IO

RX_CLK

RXD[0]

RXD[1]

RXD[2]

RXD[3]

RX_ER

RX_DV

VSSF

VDD

CRS

COL

MDIO

MDC

sel_BOOT

TEST2

TEST1

TEST0

VSS

VSS_IO

XI

XO

VDD_IO

AVSS18D

AVDD18D

AVSS18A

VBBA

AVDD18A

PLL_CAP

PCMSEL

MASTER

VDD_IO

nRESET

VSS_IO

HWSI

HWSO

HWBCK

HWWCK

HWWCK2

VDD

BGPIO[19]

BGPIO[18]

BGPIO[17]

BGPIO[16]

VSS

BGPIO[15]

BGPIO[14]

BGPIO[13]

BGPIO[12]

BGPIO[11]

BGPIO[10]

BGPIO[9]

BGPIO[8]

BGPIO[7]

BGPIO[6]

VDD_IO

BGPIO[5]

BGPIO[4]

VDD

BGPIO[3]

BGPIO[2]

VSS

BGPIO[1]

BGPIO[0]

VDD_IO

S8068

nHD[7]

nHD[6]

nHD[5]

nHD[4]

nHD[3]

nHD[2]

nHD[1]

O

I

O

–

O

–

O

–

I

–

I

I/O

O

I

–

I

O

–

I

–

I

–

I

O

I/O

O

–

I/O

–

I/O

–

I/O

–

I/O

–

I/O

–

I/O

JTAG output

JTAG input

JTAG output

Power supply (+3.3 V)

Power supply (+1.8 V)

Ground

Transmit enable

Transmit error

Transmit data

Ground

Transmit data

Transmit clock

Power supply (+3.3 V)

Receive clock

Receive data

Receive error

Receive data valid

Ground

Power supply (+1.8 V)

Carrier sense

Collision detection

Management data input and output

Management clock

Fix the pin to ‘L’ level.

Ground

Input for X’tal resonator

Output for X’tal resonator

Power supply (3.3 V)

Ground

Power supply (1.8 V)

Ground

Bulk bias pin

Power supply (1.8 V)

Capacitor connection pin for the built-in PLL

Fix the pin to ‘L’ level.

Master mode, slave mode setting. Fix the pin to ‘L’ level.

Power supply (3.3 V)

System reset

Ground

CODEC interface data-in

CODEC interface data-out

CODEC interface bit clock

CODEC interface word clock

CODEC interface word clock2

Power supply (1.8 V)

General-purpose input and output

General-purpose input and output / RINGER

General-purpose input and output

Ground

General-purpose input and output

Power supply (3.3 V)

General-purpose input and output / Input of UART: RXD1

General-purpose input and output / Output of UART: TXD1

Power supply (3.3 V)

Input of UART: RXD0 / General-purpose input and output

Output of UART: TXD0 / General-purpose input and output

Ground

General-purpose input and output / Clock input and output of I2C interface: I2C_SCL

General-purpose input and output / Data input and output of I2C interface: I2C_SDA

Power supply (3.3 V)

Access mode setting

Data input and output

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

nHD[0]

nHA[11]

VDD_IO

nHA[10]

nHA[9]

nHA[8]

nHA[7]

nHA[6]

nHA[5]

VSS_IO

VSS

nHA[4]

nHA[3]

VDD

nHA[2]

nHA[1]

nHA[0]

nHCS

nHWR

nHRD

VDD_IO

INT

nCS3

nCS2

VSS_IO

VSS

nCS1

nRD

VDD

DQM1

DQM0

nCS0

VDD_IO

nRAS

nCAS

nWE

SCKE

SCLK

VSS_IO

A[20]

A[19]

A[18]

A[17]

A[16]

A[15]

A[14]

VDD_IO

A[13]

A[12]

A[11]

A[10]

VSS_IO

VSS

A[9]

A[8]

A[7]

A[6]

A[5]

VDD

A[4]

A[3]

A[2]

A[1]

A[0]

VSS_IO

D[15]

D[14]

D[13]

D[12]

VDD_IO

D[11]

D[10]

D[9]

D[8]

VSS_IO

VSS

D[7]

D[6]

VDD

D[5]

D[4]

VDD_IO

D[3]

D[2]

D[1]

D[0]

nTRST

TDI

I/O

–

I/O

–

I/O

–

I/O

–

O

–

O

–

O

–

O

I/O

–

O

–

O

–

O

–

O

–

I/O

–

I/O

–

I/O

–

I/O

–

I/O

I

Data input and output

Address input

Power supply (3.3 V)

Address input

Ground

Address input

Power supply (1.8 V)

Address input

Chip select

80 family–Write enable 68 family–Read/Write

80 family–Read enable 68 family–Adress enable

Power supply (3.3 V)

Interrupt request signal output to host CPU

Chip select3

Chip select2

Ground

Chip select1

Read enable

Power supply (1.8 V)

SDRAM DQ Mask/Write enable

SDRAM chip select

Power supply (3.3 V)

SDRAM row adress strobe

SDRAM column adress strobe

SDRAM wite enable

SDRAM clock enable

SDRAM clock

Ground

Adress

Power supply (3.3 V)

Adress

Ground

Adress

Power supply (1.8 V)

Adress

Ground

Data

Power supply (3.3 V)

Data

Ground

Data

Power supply (1.8 V)

Data

Power supply (3.3 V)

Data

JTAG input

YTD442-RZ (X7197A00) VNP1

ENT2: IC108

ACD1

18

SN74LVC32APWR (X5405A00)

ENT2: IC115

Quad 2 Input OR

1

2

3

1A

1Y

42A

52B

62Y

7GND

1B

14

13

12

Vcc

4A

11 4Y

10 3B

9 3A

8 3Y

4B

SN74LVC74APWR (X5731A00)

ENT2: IC112, IC113

Dual D-Type Flip-Flop

INPUTS OUTPUTS

PR CLR CLK D Q Q

L

H

L

H

Q

O

H

L

H

L

Q

O

X

H

L

X

f

L

H

L

H

L

H

L

H

1

2

3

4

5

6

7

1CLR

1D

1CK

1PR

1Q

GND

14

13

12

11

10

9

8

VCC

2CLR

CLR

2D

D

2CK

CK

2PRPR

2Q

Q

CLR

D

CK

PR

Q

TC74HC123AF (XN242A0R)

BRG: IC107

Dual Retriggerable Single Shot

1A

1B

1

1Q

2Q

2 Cext

2 Rext / Cext

GND

1 16

2 15

3 14

4 13

5 12

6 11

7 10

8 9

Vcc

1 Rext / Cext

Cext

1Q

2Q

CLR

2B

2A

CLR

Q

CLR

SN74LV138APWR (X7284A00)

BRG: IC204, IC205

3 to 8 Demultiplexer

1

2

3

4

5

6

7

A

Select

Enable

Output

B

C

G2A

G2B

G1

Y7

Y7 Y5

Y4

Y3

Y2

Y1

Y0

Y6

16

15

14

13

12

11

10

Vcc

YO

Y1

Y2

Y3

Y4

Y5

8

GND

9

Y6

74VHC245MTCX_NF40 (X0296A0R)

CPU: IC003

SN74LVC245APWR (XZ287A0R)

CPU: IC021–026

TC74VHCT245AFT (XT744B0R)

BRG: IC109, IC110, IC112, IC115

TC74VHC245FT (XU797B00)

BRG: IC103, IC402, IC403

DS1: IC501

DS2: IC601

SN74LV245APWR (X3693A0R)

ENT2: IC101–104

Octal 3-State Bus Transceiver

1D1R

2

3

4

5

6

7

8

9

10

A1

A2

A3

A4

A5

A6

A7

A8

GND

11

12

13

14

15

16

17

18

19

20

V

CC

G

B1

B2

B3

B4

B5

B6

B7

B8

TC74VHC273FT (X7942B00)

DS1 : IC502, IC503

DS2 : IC602, IC606, IC607

Octal D-Type Flir Flop

CLEAR

1Q

1D

2D

2Q

3Q

3D

4D

4Q

GND

VCC

8Q

8D

7D

7Q

6Q

6D

5D

5Q

CLOCK

1 20

2 19

3 18

4 17

5 16

6 15

7 14

8 13

9 12

10 11

Q

DCK

CL

D

Q

CK

CL

Q

DCK

CL

D

Q

CK

CL

D

Q

CK

CL

Q

DCK

CL

D

Q

CK

CL

Q

DCK

CL

TC74VHC541FT (X4964B00)

BRG: IC104–106

DS1: IC505, IC506

DS2: IC609, IC610

Octal 3-State Buffer

1

2

3

4

5

6

7

20

19

18

17

16

15

14

Vcc

G2

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

8

9

10

12

11

GND

A8

A7

A6

A5

A4

A3

A2

A1

G1

13

IC BLOCK DIAGRAM

19

ACD1

SN74LV4051ANSR (X3955A00)

BRG: IC203

Single 8-Channel

Multiplexer/Demultiplexer

SN74LVCC4245APWR (X3096A00)

BRG: IC108

Dual Supply Octal Bus Transceiver

VCCA

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

VCCB

/G

B1

B2

B3

B4

B5

B6

B7

B8

GND

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

8

9

10 12

13

14

15

G1

G2

D

B

A

11

24

23

22

21

20

19

18

8

9

10

11

12

16

15

14

13

17

DS36276M (X2155A0R)

DS2: IC605

TRANSCEIVER

1

2

3

4

R

8

7

6

5

RO

DE

DI

V

CC

DO/RI

GND

RE

D

SN74LV21APWR (X2377A0R)

CPU: IC020

Dual 4 Input AND

1

2

3

1A

NC

41C

51D

61Y

7

GND

1B

14

13

12

Vcc

2C

11 NC

10 2B

9 2A

8 2Y

2D

TC74VHC02FT (X2508B00)

BRG: IC113

Quad 2 Input NOR

1

2

3

1Y

1B

42Y

52A

62B

7Vss

1A

14

13

12

Vcc

4A

11 4B

10 3Y

9 3A

8 3B

4Y

SN74LV574APWR (X5135A00)

DS1: IC504

DS2: IC608

SN74LVC574APWR (X5742A00)

ENT2: IC116, IC117

Octal D-Type Flip-Flop

10

9

8

7

6

5

4

3

2

1

D5

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D

CK

Q

OE

D6

D7

GND

D4

D3

D2

D1

D0

Output

Control

Q5

Q6

Q7

Clock

Q4

Q3

Q2

Q1

Q0

Vcc

11

12

13

14

15

16

17

18

19

20

SN74LV4052APWR (X6976A00)

BRG: IC206

Differential 4-Channel

Multiplexer/Demultiplexer

1

2

3

4

5

6

7

0Y

2Y

Y-COM

1Y

INH

VEE

VSS

3Y

16

15

14

13

12

11

VDD

2X

1X

X-COM

0X

3X

A

8

9

10

B

2Y

0Y

Y-COM

3Y

1Y

INH

B

2X

1X

X-COM

0X

3X

A

INPUTS

ON

CHANNEL

INH C B A

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

None

L

H

L

H

L

H

L

H

X

L

H

L

H

X

L

H

X

L

H

1

Y4

2

3

4

5

6

7

8

Y6

INH

GND

9

10

11

12

13

14

15

16

Vcc

Y2

Y1

Y3

A

B

C

COM

Y7

Y5

Y0

LOGIC

SN74LV04APWR (X5965A0R)

BRG: IC101, IC102, IC201

Hex Inverter

1

2

3

4

5

6

7

1A

1Y

2A

2Y

3A

3Y

Vss

14

13

12

11

10

9

8

VDD

6A

6Y

5A

5Y

4A

4Y

ACD1

20

NJM2904V (XR532A0R)

CPU: IC010

Dual Operational Amplifier

1

2

3

4

8

7

6

5

Output A +V

Non-Inverting

Input A

Ground

+DC Voltage

Supply

Output B

Inverting

Input B

Non-Inverting

Input B

Inverting

Input A

+-

TC7SH04FU (XS775A0R)

ENT2: IC110

Inverter Gate

1

2

3

5

4

NC

GND

VCC

OUT Y

IN A

TC7WH14FU (XY806A0R)

CPU: IC032

Triple lnverter

1

2

3

4

8

7

6

5

1A

2A

GND

Vcc

1Y

3A

2Y

3Y

TC7SH08FU (XR680A00)

BRG: IC207–210

ENT2: IC114

2 Input AND Gate

1 5

2

3

4

IN B

GND

Vcc

OUT Y

IN A

SN74AHC1G08DCKR (X3833A0R)

CPU: IC015

ENT2: IC114

Single 2-Input Positive-AND Gate

1

2

3

A

B

GND

5

4

Vcc

Y

INPUTS

FUNCTION TABLE

OUTPUT

AB Y

H

L

H

X

L

H

L

X

SN74AHC1G04DCKR (X4137A00)

CPU: IC008

ENT2: IC110

Inverter Gate

1

2

3

5

4

NC

GND

Vcc

OUT Y

IN A

NJM4558M (X5676A00)

DS1: IC510–525

DS2: IC616–631

Dual Operational Amplifier

1

2

3

4-V

8

7

6

5

+VOutput A

Non-Inverting

Input A

-DC Voltage Supply

+DC Voltage

Supply

Output B

Inverting

Input B

Non-Inverting

Input B

Inverting

Input A

+-

NJM2734V (TE1) (X7389A00)

DS2: IC603

Quad Operational Amplifier

1

2

3

4

5

6

7

OUT A

-IN A

+IN A

+V

DD

+IN B

-IN B

OUT B

14

13

12

11

10

9

8

OUT D

-IN D

+IN D

-VSS

+IN C

-IN C

OUT C

+-

+V

+-

-V

NJM2902M (X4983A0R)

DS1: IC507

DS2: IC611

Quad Operational Amplifier

1

2

3

4

5

6

7

Output A

Inverting

Input A

Non-inverting

Input A

+DC Voltage Supply

Non-inverting

Input B

Inverting

Input B

Output B

14

13

12

11

10

9

8

Output D

Inverting

Input D

Non-inverting

Input D

Ground

Non-inverting

Input C

Inverting

Input C

Output C

+-

+V

+-

GND

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Yamaha ACD1 ユーザーマニュアル

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