AKM AK5397EQ 仕様

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1. 概要

AK5397はプロフェッショナルディジタルオーディオ用に開発した

32bit プレミアムADCのフラッグシップとなるVERITAシリーズの

製品です。ADCとしては業界最高水準の S/N 127dB を達

成、VELVET SOUND™ テクノロジーを採用し豊かな音場表

現と低音表現、歪感の少ない録音を実現します。ディジタル出

力は業界最高水準の最大768kHzのPCM出力をサポートし、

新開発の音質を考慮した32bitディジタルフィルタを搭載しまし

た。高音質なハイレゾリューション音源の録音、編集を扱うスタジ

オミキサおよびDVR等の機器に最適です。

2. 特長

Advanced multi bit Architecture ADC

Resolution: 32bit

Sampling Rate: 8kHz ~ 768kHz

Full Differential Inputs

S/(N+D): 108dB

DR, S/N: 127dB (Mono Mode: 130dB)

Sharp Roll Off Digital Filter (GD=41.5/fs)

Passband: 0 ~ 21.82kHz (@ fs=48kHz)

Passband Ripple: +0.00010/-0.00015dB

Stopband Attenuation: 100dB

Short Delay Digital Filter (GD=12.5/fs)

Passband: 0 ~ 22.22kHz (@ fs=48kHz)

Passband Ripple: +0.055/-0.015dB

Stopband Attenuation: 93dB

Minimum Phase Digital Filter (GD=3.5/fs)

Passband: 0 ~ 21.75kHz(@ fs=48kHz)

Passband Ripple: +0.04/-0.02dB

Stopband Attenuation: 93dB

Master / Slave Mode

Master Clock:

256fs/512fs (Normal Speed; 8kHz~48kHz)

256fs (Double Speed; 48Hz~96kHz)

128fs (Quad Speed; 96kHz ~ 192kHz)

64fs (Octal Speed; 192kHz ~ 384kHz)

32fs (Hex Speed; 384kHz ~ 768kHz)

Audio Interface Format: 32bit MSB justified, I2S

compatible or TDM

Cascade TDM I/F: 8ch/48kHz, 4ch/96kHz,

4ch/192kHz

Digital HPF for Offset Cancel

Overflow Flag

Power Supply:

4.75 ~ 5.25V(Analog), 3.0 ~ 3.6V(Digital)

Power Dissipation: 455mW

Ta = -10 ~ 70 C

Package: 44-pin LQFP

32-Bit Stereo Premium ADC

AK5397

[AK5397]

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3. ブロック図

SDM1

VREFLR

VREFHR

SDM2

TDMIN2

TDMIN1

AVDD

AVSS

DVDD

SDTO1

MCLK

DIF

HPFE

LIN-

VREFLL

Delta-Sigma

Modulator

Voltage

Reference

Decimation

Filter

VCOM

RIN-

RIN+

LIN+

VREFHL

MONO

Voltage

Reference

Decimation

Filter

SDTO2

CKS0

CKS1

CKS2

LRCK

BICK

PDN

Common

Voltage

SDFI

L

TDM1

TDM0

OVF

MSN

Delta-Sigma

Modulator

HPF

Audio

Interface

DVSS

Figure 1. ブロック図

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4. 目次

1. 概要 ............................................................................................................................................... 1

2. 特長 ............................................................................................................................................... 1

3. ブロック図 ........................................................................................................................................ 2

4. 目次 ............................................................................................................................................... 3

5. ピン配置と機能説明 ......................................................................................................................... 4

■ ピン配置 ............................................................................................................................................. 4

■ ピン機能 ............................................................................................................................................. 5

■ 使用しないピンの処理 ....................................................................................................................... 6

6. 絶対最大定格 .................................................................................................................................... 7

7. 推奨動作条件 .................................................................................................................................... 7

8. 電気的特性 ........................................................................................................................................ 8

■ アナログ特性 ..................................................................................................................................... 8

■ Sharp Roll-Off Filter 特性 ................................................................................................................... 9

■ Short Delay Filter 特性 ..................................................................................................................... 11

■ Minimum Phase Filter 特性 .............................................................................................................. 12

■ Digital Filter Plot ............................................................................................................................... 14

■ DC 特性 ............................................................................................................................................ 18

■ スイッチング特性 ............................................................................................................................ 18

■ タイミング波形 ................................................................................................................................ 21

9. 動作説明 .......................................................................................................................................... 23

■ システムクロック ............................................................................................................................ 23

■ マスタモード/スレーブモード ......................................................................................................... 24

■ オーディオインタフェースフォーマット ....................................................................................... 25

■ TDMモード時のカスケード接続...................................................................................................... 29

■ Digital High Pass Filter .................................................................................................................... 33

■ Overflow Detection ........................................................................................................................... 33

■ Mono Mode ...................................................................................................................................... 33

■ ディジタル出力データ ..................................................................................................................... 34

■ パワーダウン&リセット機能 ........................................................................................................... 36

10. 外部接続回路例 ............................................................................................................................... 37

11. パッケージ ...................................................................................................................................... 41

■ 外形寸法図 ....................................................................................................................................... 41

■ 材質・メッキ仕様 ............................................................................................................................ 42

■ マーキング ....................................................................................................................................... 42

12. オーダリングガイド ....................................................................................................................... 42

13. 改訂履歴 .......................................................................................................................................... 43

重要な注意事項 ........................................................................................................................................ 44

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5. ピン配置と機能説明

■ ピン配置

VREFLR

RIN+

34

VREFHR

33

35

AVSS

36

AVDD

37

TOUT

38

VCOM

39

TEST3

40

AVDD

41

AVSS

42

VREFHL

43

VREFLL

44

RIN-

32

TEST2

31

AVSS

30

MONO

29

TDM1

28

TDM0

27

TDMIN2

26

TDMIN1

25

DVDD

24

DVSS

23

LIN+

1

LIN-

2

TEST1

3

4

5

CKS0

6

CKS1

7

CKS2

8

PDN

9

DVDD

10

DVSS

11

22

21

20

19

18

17

16

15

14

13

12

MSN

DIF

SDFIL

SDM2

SDM1

OVF

SDTO2

SDTO1

LRCK

BICK

MCLK

AK5397EQ

Top View

AVSS

HPFE

Figure 2. ピン配置

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■ ピン機能

No.

Pin Name

電源

I/O

Function

1

LIN+

A

I

Lch Positive Analog Input Pin

2

LIN-

A

I

Lch Negative Analog Input Pin

3

TEST1

A

-

Test Pin

This pin must be connected to AVSS.

4

AVSS

A

-

Analog Ground Pin, 0V

5

HPFE

D

I

HPF Enable Pin

“L”: Disable, “H” Enable

6

CKS0

D

I

Clock Mode Select #0 Pin

7

CKS1

D

I

Clock Mode Select #1 Pin

8

CKS2

D

I

Clock Mode Select #2 Pin

9

PDN

D

I

Power down & Reset pin

“L”: All blocks are powered-down and reset.

“H”: Normal Operation

10

DVDD

D

-

Digital Power Supply Pin, 3.0V ~ 3.6V

11

DVSS

D

-

Digital Ground Pin, 0V

12

MCLK

D

I

Master Clock Input Pin

13

BICK

D

I/O

Serial Data Clock Pin

When PDN pin = “L”, BICK outputs “L” in master made.

14

LRCK

D

I/O

L/R Channel Select Clock Pin

When PDN pin = “L”, LRCK outputs “L” in master made.

15

SDTO1

D

O

Serial Data Output #1 Pin (Sharp Roll Off Filter Output)

When PDN pin = “L”, SDTO1 outputs “L”.

16

SDTO2

D

O

Serial Data Output #2 Pin (Short Delay or Minimum Phase Filter Output)

When PDN pin = “L”, SDTO2 outputs “L”.

17

OVF

D

O

Analog Input Overflow Detect Pin

This pin goes to “H” if any analog inputs overflows

When the PDN pin = “L”, the OVF pin outputs “L”.

18

SDM1

D

I

SDTO1 Output Mute Pin

This function is synchronized with LRCK edges.

“L”: Normal Operation, “H”: “L” output

19

SDM2

D

I

SDTO2 Output Mute Pin

This function is synchronized with LRCK edges.

“L”: Normal Operation, “H”: “L” output

20

SDFIL

D

I

SDTO2 Digital Filter Select Pin

“L”: Short Delay, “H”: Minimum Phase

21

DIF

D

I

Audio Interface Format Pin

“L”: 32bit MSB justified, “H”: 32bit I

2

S Compatible

22

MSN

D

I

Master/Slave mode Select Pin

“L”: Slave mode, “H”: Master mode

23

DVSS

D

-

Digital Ground Pin, 0V

24

DVDD

D

-

Digital Power Supply Pin, 3.0 ~ 3.6V

25

TDMIN1

D

I

TDM Data Input #1 Pin

26

TDMIN2

D

I

TDM Data Input #2 Pin

27

TDM0

D

I

TDM I/F Format Enable Pin

“L”: Normal Mode, “H”: TDM Mode

28

TDM1

D

I

TDM I/F BICK Frequency Select Pin

“L”: 256fs, “H”: 128fs

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No.

Pin Name

電源

I/O

Function

29

MONO

D

I

Stereo/Mono mode Select Pin

“L”: Stereo mode, “H”: Mono mode

30

AVSS

A

-

Analog Ground Pin, 0V

31

TEST2

A

I

Test Pin

This pin must be connected to AVSS.

32

RIN-

A

I

Rch Negative Analog Input Pin

33

RIN+

A

I

Rch Positive Analog Input Pin

34

VREFLR

A

I

Rch Negative Reference Voltage Input Pin

Normally connected to AVSS.

35

VREFHR

A

I

Rch Positive Reference Voltage Input Pin, 4.75 ~ 5.25V

Normally connected to the VREFLR pin with a large electrolytic

capacitor and a 0.1F ceramic capacitor.

36

AVSS

A

-

Analog Ground Pin, 0V

37

AVDD1

A

-

Analog Power Supply Pin, 4.75 ~ 5.25V

38

TOUT

A

I

Test Pin

This pin must be connected to AVSS.

39

VCOM

A

O

Common Voltage Output Pin, AVDD/2

Normally connected to AVSS with a 0.1F ceramic capacitor in parallel

with a 10F electrolytic capacitor.

40

TEST3

A

I

Test Pin

This pin must be connected to AVSS.

41

AVDD2

A

-

Analog Power Supply Pin, 4.75 ~ 5.25V

42

AVSS

A

-

Analog Ground Pin, 0V

43

VREFHL

A

I

Lch Positive Reference Voltage Input Pin, 4.75 ~ 5.25V

Normally connected to the VREFLL pin with a large electrolytic

capacitor and a 0.1F ceramic capacitor.

44

VREFLL

A

I

Lch Negative Reference Voltage Input Pin

Normally connected to AVSS.

Note 1. 全てのディジタル入力ピンはフローティングにしないで下さい。

■ 使用しないピンの処理

使用しない入出力ピンは下記の設定を行い、適切に処理して下さい。

区分

ピン名

設定

Digital

TEST1/2/3, TOUT

AVSSに接続

TDMIN1/2

DVSSに接続

SDTO1, SDTO2, OVF

オープン

Analog

LIN+, LIN-

LIN+ pin と LIN- pin を接続

RIN+, RIN-

RIN+ pin と RIN- pin を接続

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6. 絶対最大定格

(AVSS=DVSS=0V; Note 2)

Parameter

Symbol

Min.

Max.

Unit

Power

Supplies:

Analog

Digital

|AVSS-DVSS| (Note 3)

AVDD

DVDD

GND1

0.3



6.0

4.6

0.3

V

Input Current, Any Pin Except Supplies

IIN



10

mA

Analog Input Voltage (Note 4)

VINA

0.3

AVDD+0.3

V

Digital Input Voltage (Note 5)

VIND

0.3

DVDD+0.3

V

Ambient Temperature (power applied)

Ta

10

70

C

Storage Temperature

Tstg

65

150

C

Note 2. 電圧は全てグランドピンに対する値です。

Note 3. AVSS, DVSSは同じアナロググランドに接続して下さい。

Note 4. VREFHL, VREFLL, VREFHR, VREFLR, LIN+, LIN-, RIN+, RIN-, TEST1-3 and TOUT pins.

Note 5. CKS0, CKS1, CKS2,PDN, SDM1, SDM2, SDFIL, TDMIN1, TDMIN2, MCLK, BICK, LRCK, DIF,

MSN, HPFE, MONO, TDM0, TDM1 pins.

注意: この値を超えた条件で使用した場合、デバイスを破壊することがあります。

また、通常の動作は保証されません。

7. 推奨動作条件

(AVSS=DVSS=0V; Note 2)

Parameter

Symbol

Min.

Typ.

Max.

Unit

Power Supplies:

Analog

AVDD

4.75

5.0

5.25

V

(Note 6)

Digital

DVDD

3.0

3.3

3.6

V

Voltage Reference

(Note 9)

“H” voltage reference (Note 7)

“L” voltage reference (Note 8)

(VREFHL/R) – (VREFLL/R)

VREFHL/R

VREFLL/R

VREF

AVDD-0.5

-

AVDD-0.5

-

AVSS

-

AVDD

-

AVDD

V

Note 2. 電圧は全てグランドピンに対する値です。

Note 6. AVDD, DVDDの電源は同時に立ち上げてください。

Note 7. VREFHL pin, VREFHR pin

Note 8. VREFLL pin, VREFLR pin

Note 9. VREFLL pin とVREFLR pin はAVSS pinに接続して下さい。アナログ入力電圧はVREFHと

VREFL間の電位差に比例します。

Vin (typ.) = 2.8 x {(VREFH) – (VREFL)} / 5 [V]

注意: 本データシートに記載されている条件以外のご使用に関しては、当社では責任負いかねますので

十分ご注意下さい。

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8. 電気的特性

■ アナログ特性

(Ta = 25C; AVDD=5.0V; DVDD=3.3V; AVSS=DVSS=0V; VREFHL=VREFHR=AVDD,

VREFLL=VREFLR=AVSS; fs=48kHz, 96kHz, 192kHz; BICK=64fs; Signal Frequency=1kHz; 32bit Data;

Measurement frequency=10Hz20kHz at fs=48kHz, 40Hz40kHz at fs=96kHz, 80Hz80kHz at

fs=192kHz; External circuit: Figure 41 “Analog input buffer circuit example 2”; unless otherwise specified)

Parameter

Min.

Typ.

Max.

Unit

Resolution

32

Bits

Analog Input Characteristics:

S/(N+D)

fs=48kHz

BW=20kHz

-1dBFS

-1dBFS (Note 10)

-2dBFS (Note 10)

-20dBFS

-60dBFS

92

-

100

108

110

102

64

dB

fs=96kHz

BW=40kHz

-1dBFS

-1dBFS (Note 10)

-20dBFS

-60dBFS

92

-

99

107

99

60

dB

fs=192kHz

BW=80kHz

-1dBFS

-1dBFS (Note 10)

-20dBFS

-60dBFS

91

-

99

106

94

54

dB

Dynamic Range (-60dBFS with A-weighted)

(Stereo Mode)

(Mono Mode)

122

125

127

130

dB

S/N (A-weighted) fs=48kHz

(Stereo Mode)

(Mono Mode)

122

125

127

130

dB

S/N (Without A-weighted) fs=96kHz

(Stereo Mode)

115

120

dB

S/N (Without A-weighted) fs=192kHz

(Stereo Mode)

111

116

dB

Input Resistance

650

720



Interchannel Isolation

120

130

dB

Interchannel Gain Mismatch

0.05

0.2

dB

Gain Drift

150

ppm/C

Input Voltage (Note 11)

2.6

2.8

3.0

Vpp

Input DC Bias Voltage

0.382×AVDD

Vpp

Power Supplies:

Power Supply Current

AVDD + VREFHL + VREFHR

DVDD (fs=48kHz, MSN=H, SDM1=L, SDM2=H)

(fs=96kHz, MSN=H, SDM1=L, SDM2=L)

(fs=192kHz, MSN=H, SDM1=L, SDM2=L)

(fs=384kHz, MSN=H, SDM1=L, SDM2=L)

(fs=768kHz, MSN=H, SDM1=L, SDM2=L)

74.6

24

52

53

34

94.0

33

71

72

46

mA

Power down current (AVDD + DVDD)

10

100

uA

Power Supply Rejection (Note 12)

-

50

-

dB

Note 10. Figure 40(アナログ入力バッファ回路例1) の回路を使用した場合です。

Note 11. この値は、 (LIN+) – (LIN-)、(RIN+) – (RIN-)の値です。入力電圧はVREFHとVREFL間の電位

差に比例します。Vin (typ.) = 2.8 x {(VREFH) – (VREFL)} / 5 [V]

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Note 12. VREFHL/R, VREFLL/R pin の電圧を一定にして、AVDD, DVDDに1kHz, 20mVppの正弦波を重

畳した場合です。

■ Sharp Roll-Off Filter 特性

(1) Sharp Roll-Off Filter 特性 (fs=48kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=48kHz)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 3 ①

PB

0

21.82

kHz

Passband Ripple (Note 14) Figure 3 ③

PR

-0.00015

+0.00010

dB

Frequency Response

(Note 14)

-0.001dB

-0.1dB

-3.0dB

-6.0dB

FR

-

21.93

22.54

23.62

23.99

-

kHz

Stopband (Note 14) Figure 3 ②

SB

26.17

3072

kHz

Stopband Attenuation Figure 3 ④

SA

100

dB

Group Delay Distortion

GD

0

1/fs

Group Delay (Note 15)

GD

41.5

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

(2) Sharp Roll-Off Filter 特性 (fs=96kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=96kHz)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 4 ①

PB

0

43.62

kHz

Passband Ripple (Note 14) Figure 4 ③

PR

-0.00015

+0.00015

dB

Frequency Response

(Note 14)

-0.001dB

-0.1dB

-3.0dB

-6.0dB

FR

-

43.87

45.10

47.25

47.99

-

kHz

Stopband (Note 14) Figure 4 ②

SB

52.36

3072

kHz

Stopband Attenuation Figure 4 ④

SA

100

dB

Group Delay Distortion

GD

0

1/fs

Group Delay (Note 15)

GD

41.4

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

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(3) Sharp Roll-Off Filter 特性 (fs=192kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=192kHz)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 5 ①

PB

0

87.32

kHz

Pass Band Ripple (Note 14) Figure 5 ②

PR

-0.005

+0.006

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

FR

-

89.52

94.33

95.97

-

kHz

Stopband (Note 14) Figure 5 ③

SB

105.60

3072

kHz

Stopband Attenuation Figure 5 ④

SA

100

dB

Group Delay Distortion

GD

0

1/fs

Group Delay (Note 15)

GD

36.3

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

(4) Sharp Roll-Off Filter 特性 (fs=384kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=384kHz)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Frequency Response

(Note 14)

-0.1dB

-1.0B

-3.0dB

-6.0dB

FR

0

-

60.67

86.93

107.70

125.30

-

kHz

Stopband (Note 14) Figure 6 ①

SB

223.93

3072

kHz

Stopband Attenuation Figure 6 ②

SA

83

dB

Group Delay Distortion

GD

0

1/fs

Group Delay (Note 15)

GD

10.6

1/fs

(5) Sharp Roll-Off Filter 特性 (fs=768kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=768kHz)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Frequency Response

(Note 14)

-0.1dB

-1.0dB

-3.0dB

-6.0dB

FR

0

-

34.01

101.51

163.13

216.16

-

kHz

Stopband (Note 14) Figure 7 ①

533.42

3072

KHz

Stopband Attenuation Figure 7 ②

85

dB

Group Delay Distortion

GD

0

1/fs

Group Delay (Note 15)

GD

8.4

1/fs

Note 13. Passbandの定義は、Passband Rippleの範囲内の周波数までとします。

Note 14. ディジタルフィルタ特性は fs (システムサンプリングレート)に比例します。0dBrは1kHzを基

準とします。

Note 15. ディジタルフィルタによる遅延演算で、ディジタルフィルタにデータが入力されてから両チャ

ネルの32ビットデータがADC出力レジスタにセットされるまでの時間です。

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■ Short Delay Filter 特性

(1) Short Delay Filter 特性 (fs=48kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=48kHz; SDFIL=“L”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 8 ①

PB

0

22.22

kHz

Passband Ripple (Note 14) Figure 8 ②

PR

-0.015

+0.055

dB

Frequency Response

(Note 14)

-0.1 B

-3.0dB

-6.0dB

FR

-

22.40

23.70

24.28

-

kHz

Stopband (Note 14) Figure 8 ③

SB

27.93

3072

kHz

Stopband Attenuation Figure 8 ④

SA

93

dB

Group Delay Distortion

GD

±0.1

1/fs

Group Delay (Note 15)

GD

12.5

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

(2) Short Delay Filter 特性 (fs=96kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=96kHz; SDFIL=“L”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 9 ①

PB

0

44.46

kHz

Passband Ripple (Note 14) Figure 9 ②

PR

-0.05

+0.02

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

FR

-

44.68

47.40

48.56

-

kHz

Stopband (Note 14) Figure 9 ③

SB

55.90

3072

kHz

Stopband Attenuation Figure 9 ④

SA

93

dB

Group Delay Distortion

GD

±0.075

1/fs

Group Delay (Note 15)

GD

12.4

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

[AK5397]

014011535-J-00 2014/11

- 12 -

(3) Short Delay Filter 特性 (fs=192kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=192kHz; SDFIL=“L”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 10 ①

PB

0

80.71

kHz

Passband Ripple (Note 14) Figure 10 ②

PR

-0.05

+0.02

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

PB

-

82.5

92.86

96.31

-

kHz

Stopband (Note 14) Figure 10 ③

SB

116.67

3072

kHz

Stopband Attenuation Figure 10 ④

SA

93

dB

Group Delay Distortion

GD

±0.02

1/fs

Group Delay (Note 15)

GD

12.2

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

Note 13. Passbandの定義は、Passband Rippleの範囲内の周波数までとします。

Note 14. ディジタルフィルタ特性は fs (システムサンプリングレート)に比例します。0dBrは1kHzを基

準とします。

Note 15. ディジタルフィルタによる遅延演算で、ディジタルフィルタにデータが入力されてから両チャ

ネルの32ビットデータがADC出力レジスタにセットされるまでの時間です。

■ Minimum Phase Filter 特性

(1) Minimum Phase Filter 特性 (fs=48kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=48kHz; SDFIL=“H”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 11 ①

PB

0

21.75

kHz

Passband Ripple (Note 14) Figure 11 ②

PR

-0.02

+0.04

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

FR

-

21.97

23.49

24.12

-

kHz

Stopband (Note 14) Figure 11 ③

SB

27.97

3072

kHz

Stopband Attenuation Figure 11 ④

SA

93

dB

Group Delay Distortion

GD

±1.5

1/fs

Group Delay (Note 15)

GD

3.5

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

[AK5397]

014011535-J-00 2014/11

- 13 -

(2) Minimum Phase Filter 特性 (fs=96kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=96kHz; SDFIL=“H”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 12 ①

PB

0

43.55

kHz

Passband Ripple (Note 14) Figure 12 ②

PR

-0.04

+0.02

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

FR

-

43.87

46.98

48.26

-

kHz

Stopband (Note 14) Figure 12 ③

SB

55.96

3072

kHz

Stopband Attenuation Figure 12 ④

SA

93

dB

Group Delay Distortion

GD

±1.5

1/fs

Group Delay (Note 15)

GD

3.4

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

(3) Minimum Phase Filter 特性 (fs=192kHz)

(Ta=25C; AVDD=4.75~5.25V; DVDD=3.03.6V; fs=192kHz; SDFIL = “H”)

Parameter

Symbol

Min.

Typ.

Max.

Unit

ADC Digital Filter (Decimation LPF):

Passband (Note 13) Figure 13 ①

PB

0

80.97

kHz

Passband Ripple (Note 14) Figure 13 ②

PR

-0.045

+0.015

dB

Frequency Response

(Note 14)

-0.1dB

-3.0dB

-6.0dB

FR

-

82.55

92.02

95.44

-

kHz

Stopband (Note 14) Figure 13 ③

SB

115.57

3072

kHz

Stopband Attenuation Figure 13 ④

SA

93

dB

Group Delay Distortion

GD

±1.6

1/fs

Group Delay (Note 15)

GD

4.2

1/fs

ADC Digital Filter (HPF):

Frequency response

(Note 14)

-3dB

-0.1dB

FR

-

0.93

6.1

-

Hz

Note 13. Passbandの定義は、Passband Rippleの範囲内の周波数までとします。

Note 14. ディジタルフィルタ特性は fs (システムサンプリングレート)に比例します。0dBrは1kHzを基

準とします。

Note 15. ディジタルフィルタによる遅延演算で、ディジタルフィルタにデータが入力されてから両チャ

ネルの32ビットデータがADC出力レジスタにセットされるまでの時間です。

[AK5397]

014011535-J-00 2014/11

- 14 -

■ Digital Filter Plot

-0.00040

-0.00030

-0.00020

-0.00010

0.00000

0.00010

0.00020

0.00030

0.00040

0 8 16 24 32 40 48

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 3. Sharp Roll Off Filter Normal Mode

-0.00040

-0.00030

-0.00020

-0.00010

0.00000

0.00010

0.00020

0.00030

0.00040

0 16 32 48 64 80 96

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 4. Sharp Roll Off Filter Double Mode

-0.00800

-0.00600

-0.00400

-0.00200

0.00000

0.00200

0.00400

0.00600

0.00800

0 32 64 96 128 160 192

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 5. Sharp Roll Off Filter Quad Mode

[AK5397]

014011535-J-00 2014/11

- 15 -

-3.20

-2.80

-2.40

-2.00

-1.60

-1.20

-0.80

-0.40

0.00

0.40

0 64 128 192 256 320 384

Frequency[KHz]

PB Ripple[dB]

-160.0

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

①

Figure 6. Sharp Roll Off Filter Octal Mode

-3.20

-2.80

-2.40

-2.00

-1.60

-1.20

-0.80

-0.40

0.00

0.40

0 128 256 384 512 640 768

Frequency[KHz]

PB Ripple[dB]

-160.0

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

①

Figure 7. Sharp Roll Off Filter Hex Mode

[AK5397]

014011535-J-00 2014/11

- 16 -

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 8 16 24 32 40 48

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 8. Short Delay Filter Normal Mode

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 16 32 48 64 80 96

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 9. Short Delay Filter Double Mode

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 32 64 96 128 160 192

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 10. Short Delay Filter Quad Mode

[AK5397]

014011535-J-00 2014/11

- 17 -

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 8 16 24 32 40 48

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 11. Minimum Phase Filter Normal Mode

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 16 32 48 64 80 96

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 12. Minimum Phase Filter Double Mode

-0.080

-0.060

-0.040

-0.020

0.000

0.020

0.040

0.060

0.080

0 32 64 96 128 160 192

Frequency[KHz]

PB Ripple[dB]

-140.0

-120.0

-100.0

-80.0

-60.0

-40.0

-20.0

0.0

20.0

Attenation[dB]

②

④

③

①

Figure 13. Minimum Phase Filter Quad Mode

[AK5397]

014011535-J-00 2014/11

- 18 -

■ DC 特性

(Ta= -10~70C; AVDD=4.75~5.25V; DVDD=3.03.6V)

Parameter

Symbol

Min.

Typ.

Max.

Unit

High-Level Input Voltage (Note 5)

VIH

70%DVDD

-

V

Low-Level Input Voltage (Note 5)

VIL

-

30%DVDD

V

High-Level Output Voltage (Iout=-100A)

Low-Level Output Voltage (Iout= 100A)

VOH

VOL

DVDD0.5

-

0.5

V

Input Leakage Current

Iin

-

10

A

Note 5. CKS0, CKS1, CKS2,PDN, SDM1, SDM2, SDFIL, TDMIN1, TDMIN2, MCLK, BICK, LRCK, DIF,

MSN, HPFE, MONO, TDM0, TDM1 pin

■ スイッチング特性

(Ta= -10~70C; AVDD=4.75~5.25V; DVDD=3.03.6V; C

L

=20pF)

Parameter

Symbol

Min.

Typ.

Max.

Unit

Master Clock Timing

Frequency

Pulse Width Low

Pulse Width High

fCLK

tCLKL

tCLKH

2.048

0.4/fCLK

12.288

24.576

MHz

ns

LRCK Timing (Slave Mode)

Normal mode (TDM1=“L”, TDM0=“L”)

LRCK Frequency

Duty Cycle

fs

Duty

8

45

768

55

kHz

%

TDM256 MODE (TDM1=“L”, TDM0=“H”)

LRCK Frequency

“H” time

“L” time

fs

tLRH

tLRL

8

1/256fs

48

kHz

ns

TDM128 MODE (TDM1=“H”, TDM0=“H”)

LRCK Frequency

“H” time

“L” time

fs

tLRH

tLRL

8

1/128fs

192

kHz

ns

LRCK Timing (Master Mode)

Normal mode (TDM1=“L”, TDM0=“L”)

LRCK Frequency

Duty Cycle

fs

Duty

8

50

768

kHz

%

TDM256 MODE (TDM1=“L”, TDM0=“H”)

LRCK Frequency

“H” time (Note 16)

fs

tLRH

8

1/8fs

48

kHz

ns

TDM128 MODE (TDM1=“H”, TDM0=“H”)

LRCK Frequency

“H” time (Note 16)

fs

tLRH

8

1/4fs

192

kHz

ns

Note 16. I

2

Sフォーマット時は“L” timeです。

[AK5397]

014011535-J-00 2014/11

- 19 -

Parameter

Symbol

Min.

Typ.

Max.

Unit

Audio Interface Timing (Slave mode)

Normal mode (TDM1=“L”, TDM0=“L”)

(8KHz≦fs≦192KHz)

BICK Period (8kHz  fs 48kHz)

(48kHz < fs  192kHz)

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “” (Note 17)

BICK “” to LRCK Edge (Note 17)

LRCK to SDTO1/2 (MSB) (Except I

2

S mode)

BICK “” to SDTO1/2

tBCK

tBCKL

tBCKH

tLRB

tBLR

tLRS

tBSD

1/128fs

1/64fs

32

20

ns

Normal mode (TDM1=“L”, TDM0=“L”)

(192KHz≦fs≦768KHz)

BICK Period (192kHz  fs 384kHz)

(384kHz < fs  768kHz)

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “” (Note 17)

BICK “” to LRCK Edge (Note 17)

BICK “” to SDTO1/2

tBCK

tBCKL

tBCKH

tLRB

tBLR

tBSD

1/64fs

1/32fs

16

10

ns

TDM256 mode (TDM1=“L”, TDM0=“H”)

BICK Period

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “” (Note 17)

BICK “” to LRCK Edge (Note 17)

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

tBCK

tBCKL

tBCKH

tLRB

tBLR

tBSD

tTDS

tTDH

1/256fs

32

20

10

20

ns

TDM128 mode (TDM1=“H”, TDM0=“H”)

(8kHz  fs  96kHz)

BICK Period

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “” (Note 17)

BICK “” to LRCK Edge (Note 17)

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

tBCK

tBCKL

tBCKH

tLRB

tBLR

tBSD

tTDS

tTDH

1/128fs

32

20

10

20

ns

TDM128 mode (TDM1=“H”, TDM0=“H”)

(96kHz < fs  192kHz)

BICK Period

BICK Pulse Width Low

Pulse Width High

LRCK Edge to BICK “” (Note 17)

BICK “” to LRCK Edge (Note 17)

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

tBCK

tBCKL

tBCKH

tLRB

tBLR

tBSD

tTDS

tTDH

1/128fs

16

10

ns

[AK5397]

014011535-J-00 2014/11

- 20 -

Parameter

Symbol

Min.

Typ.

Max.

Unit

Audio Interface Timing (Master mode)

Normal mode (TDM1=“L”, TDM0=“L”)

BICK Frequency (8kHz  fs  192kHz)

(192kHz < fs  384kHz)

BICK Duty

BICK “” to LRCK

BICK “” to SDTO1/2

fBCK

dBCK

tMBLR

tBSD

12

20

64fs

32fs

50

12

20

Hz

%

ns

Normal mode (TDM1=“L”, TDM0=“L”)

(384KHz < fs ≦ 768KHz)

BICK Frequency

BICK Duty

BICK “” to LRCK

BICK “” to SDTO1/2

fBCK

dBCK

tMBLR

tBSD

6

10

32fs

50

6

10

Hz

%

ns

TDM256 mode (TDM1=“L”, TDM0=“H”)

BICK Frequency

BICK Duty (Note 18)

BICK “” to LRCK

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

fBCK

dBCK

tMBLR

tBSD

tTDS

tTDH

12

20

10

256fs

50

12

20

Hz

%

ns

TDM128 mode (TDM1=“H”, TDM0=“H”)

(8kHz  fs  96kHz)

BICK Frequency

BICK Duty

BICK “” to LRCK

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

fBCK

dBCK

tMBLR

tBSD

tTDS

tTDH

12

20

10

128fs

50

12

20

Hz

%

ns

TDM128 mode (TDM1=“H”, TDM0=“H”)

(96kHz < fs  192kHz)

BICK Frequency

BICK Duty

BICK “” to LRCK

BICK “” to SDTO1/2

TDMIN1/2 Setup Time

TDMIN1/2 Hold Time

fBCK

dBCK

tMBLR

tBSD

tTDS

tTDH

6

10

10

128fs

50

6

10

Hz

%

ns

Reset timing

RSTN Pulse width

tRTW

150

ns

Note 17. この規格値はLRCKのエッジとBICKの“”が重ならないように規定しています。

Note 18. この規格値はMCLK=512fsの場合です。MCLK=256fsの場合、デューティは保証できません。

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AKM AK5397EQ 仕様

AKM AK5397EQ 仕様

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